1. Field of the Invention
This invention relates to bonding methods and articles produced thereby.
2. Background Art
Micromachined sensors, actuators, microinstruments, and microsystem have made significant progress during the past two decades and many prototype devices have been demonstrated for a number of different applications. Many other devices have been successfully commercialized, including pressure sensors for automotive and industrial processing applications, and more recently accelerometers for automotive and consumer applications. Other devices are also finding their way into large volume commercial markets, such as MEMS for optical communication systems (sometimes referred to as micro-opto-electro-mechanical-systems or MOEMS), MEMS for wireless RF communication systems (RF MEMS), and the increasingly growing area of biomedical microsystems (BioMEMS). Other emerging applications include micro power generation systems, environmental monitoring systems, microsystems for industrial process control, health care, and consumer applications. While these application require a variety of different sensors, actuators, low-power interface and signal processing circuits, and wireless interfaces, they all share the need for reliable, stable, and robust packaging technologies. Packaging has been one of the most costly and least developed aspects of a microsystem, and often plays a detrimental effect on overall device performance. Much of the packaging technologies developed for commercialized devices has relied on adapting already existing technologies previously developed for integrated circuits. These technologies have been useful in some MEMS devices, including accelerometers, which require relatively simple techniques. The main shortcoming of many of these technologies is the fact that they are applied to individual devices, typically at the end of the fabrication process after the devices are diced apart from their host wafer. This requires individual handling of the final device in order to incorporate the package into its final intended package. This individual handling increases the chances of damage to the device, has a negative influence on device performance, and most importantly increases the cost. Therefore, attention has increasingly been focused on developing new technologies that can be applied at the wafer level, usually before the device is separated from the host wafer.
Because of the diversity of applications, device structures, and requirements for MEMS and microsystems, a variety of packaging and interconnect techniques have to be developed to meet the requirements of these applications.
There are several key technological challenges in packaging of microsystems. These can be categorized under three general topics of: transducer encapsulation (protection), connection, and assembly as listed in Table 1. Packaging of MEMS is different than packaging of other standard microelectronic components because MEMS by their nature require direct interaction with their surrounding environment. As a result, the device cannot be physically isolated from the surrounding environment and selective access needs to be provided to the sensing/actuating part of the MEMS device. This creates a significant problem for the package, since the package has to protect the device while providing access to the environment the device is supposed to interact with, simultaneously. As a result, a lot of effort has been expended on developing the proper protection/encapsulation medium for MEMS. Two general approaches have been taken: the first depends on a package in the form of a shell or capsule that can be bonded to the device substrate; and the second relies on using a thin film material that protects the regions that need protection, while providing access to those that need to interact with the external environment. In either case, the packaging has to satisfy certain requirements.
TABLE 1Key Technological Requirements in Packagingand Assembly of Integrated MicrosystemsEncapsulation/ProtectionConnectionAssemblyShells, Thin FilmsReconfigurableModularizedSelective ExposureElectrical/Fluidic/OpticalRemovableWafer-Level, smallSealed/BufferedStandardizedFeedthroughsHermetic, orCables, Spring ContactsReconfigurableVacuum-SealedCorrosion Resistant,Low ParasiticsReusableMedia-Compatible(R, C, L), SmallLong-term stability, reliability, uniformity, reproducibility,and long-term testing
The most important requirement is that the package can be applied at the wafer level before the devices are diced apart from their host wafer. This wafer level approach not only reduces cost, but also protects the device during the subsequent process steps, such as cleaning and dicing that often damage the delicate MEMS device. The package needs to be as small as possible, dictated either by the requirement for low-cost or by the application area itself that often requires a small size for proper operation. The package has to provide a hermetically-sealed environment, and in some instances a vacuum medium that is stable over many years, such as is required in resonant devices. The package should be resistant to harsh media the MEMS operate in, but it additionally needs to be compatible with the media it operates in and not cause any damage to that media, as for example in biomedical applications where the package has to be biocompatible. This last requirement is often overlooked, but frequently has significant implications for the process technologies and materials used since it limits the range of materials and processes that can be used to implement the package.
The second category of techniques that need to be developed for packaging of MEMS and microsystems is that of connection. As mentioned before, MEMS packages have to be capable of providing access to the environment with which the sensor/actuator interact. This means that the package has to be capable of providing sealed and reliable feedthroughs between the sensor/actuator, that are typically outside of the package and in direct exposure to the surrounding media, and devices/electronics that are sealed inside the package. In addition, once packaged, the MEMS devices have to have interconnections that transfer signals from the device to the outside world. It is important to note there that interconnects are not only for electrical signals but also for other types of signals such as optical, fluidic, and chemical signals. So, one has to be able to pass a variety of signals to and from the device after it has been packaged. The most suitable interconnection techniques are those that can be easily reconfigured and reused for different applications. It is desirable that interconnects are easily removed and reused as the device is used in different microsystems. The connection should not degrade the signal quality and have low parasitics (such as resistance, capacitance, or inductance), and it should be as small as possible for obvious reasons. Interconnections and feedthroughs are often ignored when a packaging technology is developed for MEMS, but usually end up being one of the most important aspects of the package because they are either very large, or cause device failure.
The third category of techniques required for packaging of microsystems is that of assembly. This area is also often overlooked but becomes increasingly critical when developing microsystems that combine a number of different chips and modules. One simple example of assembly is when the MEMS chip is to be connected to a circuit chip. This has historically been done by placing both substrates on a common board, often a printed circuit board that has the required traces to transmit signals from one chip to the other. Wire bonding is then used to interconnect pads on the MEMS/IC chip to the traces on the board. In many emerging microsystems, however, this approach is neither sufficient nor practical. These microsystems usually contain more than two substrates and they have to occupy a very small volume. Therefore, the assembly and interconnect approaches chosen have to be compatible with small size, and flexibility often required by a given application. In addition, cost is a critical factor and needs to be kept as small as possible. Therefore, it is vital that assembly techniques that are reliable, modular, and reconfigurable be developed. It is advantageous if a set of standards can be developed for a variety of device substrates, so that independent of the device type, the shape and input/output (IO) pad layout is such that they can all be assembled together using a standard mechanism. Many multi-chip systems are assembled together without any possibility of reconfigurability and re-work. If the assembly technique is re-workable, meaning that after assembly the individual units can be pulled apart and reassembled again without the loss of performance or yield, and if the physical layouts and dimensions are standardized, the overall cost of microsystems could be significantly reduced. Modularity is another desirable feature of future microsystem assembly technologies. This means that different chips can be assembly together in a modular fashion, so that one can be taken out and replaced with another without the need for developing a whole new set of hardware. Therefore, where possible, assembly structures and interfaces need to be standardized, use techniques that are amenable to re-work and multiple connect/disconnect cycles, be small, and be compatible with a variety of device types and technologies.
In all of these areas, the need for low cost and small packaging technologies that can be integrated with the devices and microsystems being developed is paramount and often determines whether a given approach is successful or not. In order to satisfy many of these requirements, microfabrication and micromachining technologies, such as those developed for MEMS, have to be used, and seamlessly integrated with the overall fabrication process of the microsystem.
Packaging Using Capsules or Shells
As mentioned above, the package needs to protect the sensitive parts of MEMS while allowing selective access to those parts that need to be in contact with the medium being monitored. One way to provide such protection is based on using a physical shell or capsule 10 that can be placed over the sensitive parts or devices 13, while feedthroughs 14 are passed through the package to connect to other components that are in contact with the medium, as illustrated in FIG. 1. The capsule 10 is bonded to an insulating layer 15 formed on a substrate 11 at bond regions 12. The devices 13 are positioned in the resulting hermetic/vacuum cavity.
The capsule 10 can be fabricated from a variety of materials, including metals, like a metal can or enclosure, glass/ceramic, silicon, or other semiconductor materials. It is often fabricated as an individual or separate piece that is applied to the MEMS part. This individual handling is not desirable because it increases the cost and also exposes the MEMS part to process steps that can potentially damage or compromise the part. It is, therefore, desirable that the package capsule be fabricated at the wafer level before the MEMS parts are diced apart from their host wafer, and that the package wafer is bonded to the device wafer using a reliable technique. Therefore, the area where the package and the device substrate are attached is an important area, and a reliable bonding technique should be utilized to achieve a permanent seal between the package and the substrate. To do this, a variety of bonding techniques have been utilized. These bonding techniques include silicon-glass bonding, glass frit bonding, eutectic or solder bonding, and a variety of other bonding techniques. The advantages of a package capsule is that it can provide a very reliable and long-term stable hermetic or vacuum environment since these packages are quite resistant to permeation by various gases or environmental parameters such as moisture. Another important aspect of the package is the feedthroughs needed to transfer signals from sensors/actuators outside of the package to the devices and circuits inside the package cavity. FIG. 1 shows an examples of lateral (or on wafer) feedthroughs. It is possible to also fabricate vertical (or through wafer) feedthroughs. In either case, the feedthrough has to have low parasitics (resistance or capacitance) and has to be an integral part of the overall package and be sealed to avoid any leakage. Feedthroughs are often a primary source of failure in many packages.
Packaging approaches based on capsules and shells bonded to a device substrate are discussed below.
Silicon-Glass Packages Based on Anodic (Electrostatic) Bonding
One of the most widely used bonding techniques in MEMS is that of bonding between a glass wafer/structure made of Pyrex 7440 glass and a polished silicon substrate through a process called electrostatic, or anodic, bonding. Electrostatic bonding of glass and silicon wafers has long been used for the fabrication of a variety of silicon-based sensors. This bonding can be achieved when two polished wafers of silicon and glass are brought into intimate contact and a high voltage is applied across this sandwich to create a permanent chemical bond. The glass-silicon sandwich is heated to temperatures of about 300-400° C., which tends to soften the glass and lower its electrical resistivity, and a DC voltage of 800-1500V is applied across the glass-silicon combination. This voltage generates a very high electrostatic attractive force, which pulls the silicon and the glass into intimate contact, thus promoting and creating a chemical bond. Once the bond is complete, the structure is cooled down to room temperature. The bond is achieved between Si and O2 atoms and is created by the high temperature and the extreme attractive force generated by the electrostatic voltage. The Si—O bond is stronger than the Si—Si bond, and is stronger than the glass. In order to minimize intrinsic stresses generated within the structure and at the silicon-glass interface, the thermal expansion coefficients of the glass and silicon have to be as nearly matched as possible. Therefore, Pyrex glass code #7740 is often used for silicon-glass bonding applications since this glass not only has an expansion coefficient very close to that of silicon, but it has a low softening point that helps lower the bonding temperature. In order to ensure a high quality bond, the surfaces of both the silicon and the glass have to be polished and free of any scratches and defects.
Using glass as a package shell has several advantages. First, it is transparent to light and RF signals, and therefore, it can be use din MOEMS as well as biomedical applications where a radio frequency signal has to be transmitted to the devices protected under the shell. Additionally, Pyrex glass is biocompatible, and is resistant to many common corrosive environments, such as salt water and humidity. The technology for making glass wafers is quite established, and the material can be obtained at low cost. There already exists extensive experience with using this glass-silicon bonding in manufacturing many sensor structures, such as pressure sensors and accelerometers. This technology has been used to develop a miniature package for bio-MEMS devices with high density multiple feedthroughs. This packaging technology utilizes electrostatic bonding of a custom-made glass capsule to a silicon substrate to form a hermetically sealed cavity.
Packaging Using Solders and Eutectic Bonding
In addition to anodic silicon-glass bonding, a number of other bonding techniques have also been used for packaging, including silicon-gold eutectic bonding, glass frit bonding, fusion bonding, and bonding using evaporated glass. One of the most commonly used wafer bonding techniques is based on solder or eutectic bonding. In its simplest form, a solder of a suitable material set can be formed in the bond area between a package and device substrates. The two substrates are brought together and the temperature is raised until the solder flows and creates a bond between the two substrates. The most obvious material to use is standard solder used in microelectronic applications. However, the shortcoming of many of these solder materials is that they contain either flux or sufficient impurities to cause them to have significant outgassing during the reflow process. This creates a major problem when trying to use this technique for vacuum packaging. Recent work on using new fluxless solder materials can overcome this problem and several groups are pursuing this. Instead of standard solder, it is also possible to use alloys of different materials in the form of eutectic solder. One of the most common material sets has been the eutectic of gold and silicon. Silicon-gold eutectic is quite attractive because it is formed at a temperature of 363° C. with one part silicon and four parts gold. These materials are commonly used in MEMS fabrication and when the eutectic is formed, outgassing is not a problem since the mixture is simply formed by raising the temperature and the starting materials are pure. In addition, the temperature is low enough for most applications.
Although Au—Si eutectic has long been used for wafer bonding and packaging, few have reported its successful use in vacuum packaging. There are several reasons for this, including non-uniform eutectic flow, void formation, insufficient eutectic material in between wafers causing non-uniform bonding, oxidation of bond surfaces, and poor surface contact/adhesion. Furthermore, few published reports have presented data showing full wafer-level bonding. The main problem with Au—Si eutectic bonding has been a lack of uniformity over an entire wafer, and lack of reproducibility from wafer-to-wafer.
Gold-silicon eutectic formation occurs at 363° C. for 19 at % Si. The eutectic can be used to bond two wafers, or be used for hermetic and vacuum packaging. To form the eutectic, silicon and gold have to be provided to the interface where two wafers are bonded. Typically, the gold is deposited on one of the wafers to the desired thickness, and the silicon is provided either from the bulk of one of the wafers, or from thin films deposited on one or both wafers. For example, a device wafer containing feedthroughs and a top polysilicon layer, and a cap wafer containing a package cavity and an electroplated bond ring may be provided. When the two wafers are brought into contact and heated to above 363° C., silicon is supplied from both the cap wafer (underneath the gold ring), and the device wafer (the polysilicon layer) and will react with gold to initiate the eutectic liquid formation. Upon cooling, the bond consists of Au—Si hypereutectic phase and represents a typical strong diffusional bond.
Different wafers with a different set of materials and bonding layers have been bonded together. The material sets include: Si/Ti/Au to Au/Ti/Si; Si/Ti/Au to Si; Si/Ti/Au to PolySi/Si; Si/Ti/Au to Oxide/Si; and Si/Ti/Au to Nitride/Si. Of these wafers, it has been discovered that the bond quality and uniformity between Au—Au, Au—Si, and Au-PolySi is the best. In particular, it is noted that the bond quality is best when the gold and silicon are supplied from the two wafers, instead of both from the same wafer. Test wafers where the Au—Si eutectic was bonded to a substrate covered with either oxide or nitride produced very non-uniform and poor bonds.
One of the main problems with using Si—Au eutectic as a bonding medium between wafers has been the lack of uniformity and reproducibility. There are many reasons for this as mentioned before. In order to achieve good uniformity and reproducibility, the Au—Si eutectic bond should be conducted: (a) in a vacuum or inert gas ambient to avoid further oxidation at high temperature; (b) the bonding surface should be kept clean and free of any contaminants; (c) some contact force should be applied on the wafers to provide an intimate contact between the bonding materials of Au and polysilicon; (d) the bonded wafers should be cooled down as fast as possible around the eutectic temperature; (e) in order to provide sufficient Au—Si eutectic, the thickness of the eutectic material should be several microns so when the wafers are pressed together, eutectic can cover over non-planar surfaces; and (f) the wafers should be properly baked to minimize outgassing.
As mentioned above, the silicon-gold eutectic bonding requires that the surfaces be prepared and cleaned well. In addition, it is important that during the bonding process, the gold and silicon are supplied from the two wafers, so that the interdiffusion of the two materials creates an intimate contact to both surfaces. It has also been mentioned that the bond quality of an Si—Au eutectic-to-silicon oxide, nitride, or glass is typically not very good and non-uniform.
The following prior art references are related to the present invention:
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